




Featured 48-bit addressing and a novel integrated database system
Its architecture served as the basis for the AS/400





IBM rebranded the server line to eServer

The eServer iSeries was built on the POWER4

The eServer pSeries, running AIX, was also introduced

This was the first time the same processors were used in both server lines


iSeries is rebranded to i5
The OS is rebranded to i5/OS
The POWER5 implements simultaneous multithreading (SMT), where two threads are executed simultaneously

Final rebrand before the System i and System p servers merged in 2008


Dual-core processor
Each core is capable of two-way simultaneous multithreading (SMT)
Maximized processor frequency, achieving 5 GHz

IBM officially merged the System i and System p lines of servers
i5/OS is rebranded to IBM i




Superscalar multicore architecture
Focused on power efficiency through multiple cores and SMT
Featured up to 8 cores with 4 threads per core for a total capacity of 32 simultaneous threads

Designed to be a massively multithreaded chip
Each core could handle 8 hardware threads simultaneously, for a total of 96 threads executed simultaneously on a 12-core chip
On- and off-chip eDRAM caches and on-chip memory controllers enable very high bandwidth to memory and system I/O
2X to 3X performance improvements over POWER7


12- and 24-core versions for scale out and scale up applications
Summit, the fifth fastest supercomputer (based on the Top500 list as of November 2022), is based on POWER9, while also using NVIDIA Tesla GPUs as accelerators

15 cores
Focus is on AI workloads
Higher performance per watt and better I/O architectures



Celebrating 35 years of business computing history